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	<title>XJTAG Blog &#187; Board Design</title>
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	<link>http://blog.xjtag.com</link>
	<description>XJTAG boundary scan solutions for the whole product lifecycle</description>
	<lastBuildDate>Wed, 26 May 2010 07:10:24 +0000</lastBuildDate>
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		<title>TCK Termination</title>
		<link>http://blog.xjtag.com/2010/02/tck-termination/</link>
		<comments>http://blog.xjtag.com/2010/02/tck-termination/#comments</comments>
		<pubDate>Mon, 22 Feb 2010 08:00:54 +0000</pubDate>
		<dc:creator>Dominic Plunkett</dc:creator>
				<category><![CDATA[Board Design]]></category>
		<category><![CDATA[XJLink2]]></category>

		<guid isPermaLink="false">http://blog.xjtag.com/?p=169</guid>
		<description><![CDATA[We all pay close attention to the termination of high speed signals, especially clock signals. However in many of the designs I see this doesn&#8217;t seem to have happened for the JTAG clock signal TCK. But TCK is a clock signal just like any other clock signal.

Some people believe that because JTAG is only for [...]]]></description>
			<content:encoded><![CDATA[<p>We all pay close attention to the termination of high speed signals, especially clock signals. However in many of the designs I see this doesn&#8217;t seem to have happened for the JTAG clock signal TCK. But TCK is a clock signal just like any other clock signal.<br />
<span id="more-169"></span><br />
Some people believe that because JTAG is only for test it doesn&#8217;t matter. Other people think that you can just reduce the clock frequency during testing to solve problems. But terminating the TCK signal correctly really does matter! High speed JTAG interfaces have a need to have fast rise and fall times to ensure good signal quality. It is these fast edges that cause problems with poorly terminated boards. The usual problem is a reflection causing an extra clock pulse. If you want to try and have a look at this on a scope you will need a fast scope (500MHz or greater bandwidth), a good probe and a very short ground connection (&lt;1 inch). Turn up the timebase and look at the rising edge of the clock. In a good system the edge will rise continuously and have no dips on the way up to the logic 1 level. A poorly terminated system will have a rising edge and then a dip and continue rising again. This dip can cause an extra clock edge. JTAG interfaces with slow rise and fall times mask poorly terminated boards. This is why sometimes cheap low speed JTAG interfaces work and high speed ones don&#8217;t.</p>
<h2>Correct TCK Termination</h2>
<p>To correctly terminate a board, place a 100R resistor to ground at the end of the TCK net on the circuit board. Track the TCK net as a 100R track to each device in turn with out any stubs etc.<br />
If you buffer the TCK signal, remember to terminate the TCK signal at the input to the buffer. Also each output of the buffer will need termination as above.</p>
<h2>Dealing with poorly terminated boards</h2>
<p>XJLink2 helps you to run tests on poorly terminated boards in two ways:</p>
<p>1) XJLink2 enables variable source termination impedances to match your board.<br />
2) Variable Slew rates.</p>
<p>Variable source termination impedance match enable the XJLink2 to better match the termination on you board so if a 220R resistor is fitted for instance then you can select 220R as the source impedance. If you have no termination fitted then there is a &#8220;none&#8221; option as well.</p>
<p>The variable Slew rates enable the rise and fall times to be adjusted to improve the signal quality of the TCK. The slower the Slew rate the better the signal quality will be but the lower the maximum TCK frequency will be as well.</p>
<p>By adjusting the Source termination impedance and the Slew rate, XJLink2 can provide high quality signals across long cables into poorly terminated systems. For example, we recommend only using 15cm of JTAG cable; we have however used XJLink2 with over 4metres of cable at 20MHz, which was greater than the devices on the board were rated at.</p>
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		<title>Voltage Measurements with XJLink2</title>
		<link>http://blog.xjtag.com/2010/02/voltage-measurements-with-xjlink2/</link>
		<comments>http://blog.xjtag.com/2010/02/voltage-measurements-with-xjlink2/#comments</comments>
		<pubDate>Mon, 08 Feb 2010 08:00:05 +0000</pubDate>
		<dc:creator>Dominic Plunkett</dc:creator>
				<category><![CDATA[Board Design]]></category>
		<category><![CDATA[XJLink2]]></category>

		<guid isPermaLink="false">http://blog.xjtag.com/?p=166</guid>
		<description><![CDATA[One of the exciting new features of XJLink2 is the ability to measure a number of voltages. Via the 20-way XJlink2 connector you can measure up to 18 different voltages. This means supply rail voltages can be measured before (and during) JTAG testing, and analogue measurements are now simple to make during your tests.

Many modern [...]]]></description>
			<content:encoded><![CDATA[<p>One of the exciting new features of XJLink2 is the ability to measure a number of voltages. Via the 20-way XJlink2 connector you can measure up to 18 different voltages. This means supply rail voltages can be measured before (and during) JTAG testing, and analogue measurements are now simple to make during your tests.<br />
<span id="more-166"></span><br />
Many modern boards have a number of supply rails. Some of these need to be quite accurate to ensure stable operation. The XJLink2 is +/-( 0.2% + 10 mV) accurate, which is easily good enough to test supplies that have to be within 1% tolerance &#8211; we find most supplies have to be within 5%.</p>
<p>The input voltage range of the XJlink2 is 0 to 5 V. If you have a higher voltage rail then, then a potential divider will be required.</p>
<p>To use the voltage measurement you simply have to make sure the voltages / supply rails you would like to measure are brought out to  spare pins on the XJLink2 connector.</p>
<p>You can take this a step further, If you what to check the current though an LED this becomes easy with XJLink2. Most LEDs have a series resistor to limit the current. If this resistor is between ground and the LED, you just need to measure the voltage across the resistor and do a little bit of maths with the resistor value to calculate the current in the LED ( V=IR ). If the LED takes the correct current then it is very likely to be working. LEDs not fitted / fitted the wrong way round / open circuit or short circuit will almost always give very different reading from the correct value. This might enable you to test the LED without asking the test operator if the LED lights.</p>
<p>This an example of how XJTAG can save you time and reduce the amount of test equipment you need during production testing and board bring up.</p>
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		<title>XJLink2 Frequency Measurement</title>
		<link>http://blog.xjtag.com/2010/01/xjlink2-frequency-measurement/</link>
		<comments>http://blog.xjtag.com/2010/01/xjlink2-frequency-measurement/#comments</comments>
		<pubDate>Mon, 25 Jan 2010 08:00:48 +0000</pubDate>
		<dc:creator>Dominic Plunkett</dc:creator>
				<category><![CDATA[Board Design]]></category>
		<category><![CDATA[XJLink2]]></category>

		<guid isPermaLink="false">http://blog.xjtag.com/?p=237</guid>
		<description><![CDATA[XJLink2 is the only JTAG interface that can accurately measure frequency.
Why Measure Frequencies?
Often in products oscillators are used, for instance in USB you require an oscillator to be within 100 ppm. With crystals this is seen as easy, but it can be a little harder than you expect. A standard crystal may be accurate to [...]]]></description>
			<content:encoded><![CDATA[<p>XJLink2 is the only JTAG interface that can accurately measure frequency.<span id="more-237"></span></p>
<h2>Why Measure Frequencies?</h2>
<p>Often in products oscillators are used, for instance in USB you require an oscillator to be within 100 ppm. With crystals this is seen as easy, but it can be a little harder than you expect. A standard crystal may be accurate to +/- 30 ppm with a temperature stability of +/- 50 ppm and an ageing of +/-5 ppm per year. So in the worst case we are at 85 ppm after the first year. Now add on the effects from tolerances of the load capacitors (often 22 pF or 33 pF) and you might be over the limit! </p>
<p>Low power devices often use crystals which specify lower load capacitances but which are as a result more sensitive to errors in load capacitance. These errors can come from the capacitors themselves (tolerance), track layout and IC capacitance. At manufacture you might want to check the crystal is operating at the correct frequency or close to it. XJLink2 is able to measure up to 18 frequencies with an accuracy of 10 ppm. In fact, typically at room temperature this is 2 ppm.</p>
<p>For the above USB case we might in the factory be happy with a product that is +/-40 ppm. This still gives a little margin for temperature and ageing of the crystal. Frequency measurement will find errors such as wrong load capacitors or crystal used. If a wrong crystal is fitted it could be the wrong frequency part or more subtly could be a 12 pF load capacitance crystal used instead of a 33 pF load capacitance crystal.</p>
<p>If you have the wrong crystal (not frequency but load capacitance) the oscillator may not even start. More likely is the situation in which it will oscillate but at the wrong frequency. If it does this in the USB case the product may not enumerate correctly on all PCs to which the product is connected to, which might cause a customer support issue.</p>
<p>&#160;</p>
<h2>Measuring Frequencies </h2>
<p>To measure a frequency all you need to do is connect up the signal you would like to measure to a spare IO pin on the XJLink2 connector. Don&#8217;t connect the crystal directly to the connector because the capacitive loading of the cable will change the frequency. Fortunately most devices that use crystals can output a frequency. It doesn&#8217;t have to be the same frequency as the crystal to measure the ppm error, so if for instance a processor has a crystal oscillating at 24 MHz but can output 48 MHz this will be fine for measuring the ppm error.</p>
<p>For EMC reasons you might like to turn off the output when not testing the product. You might use another spare output from the XJLink2 if required to enable the frequency only during testing. </p>
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		<title>Integrating XJTAG with other Test Systems &#8211; DFT</title>
		<link>http://blog.xjtag.com/2009/10/integrating-xjtag-with-other-test-systems-dft/</link>
		<comments>http://blog.xjtag.com/2009/10/integrating-xjtag-with-other-test-systems-dft/#comments</comments>
		<pubDate>Mon, 05 Oct 2009 07:00:51 +0000</pubDate>
		<dc:creator>John Barton</dc:creator>
				<category><![CDATA[Board Design]]></category>
		<category><![CDATA[XJDeveloper]]></category>
		<category><![CDATA[DFT]]></category>

		<guid isPermaLink="false">http://blog.xjtag.com/?p=229</guid>
		<description><![CDATA[This series of posts will cover how you can integrate XJTAG into your overall test system.
This post is a quick reminder that you can use XJTAG as the focal point for your DFT analysis across all your test systems.
The Functional Tests screen in XJDeveloper allows you to mark devices, pins or nets as being tested [...]]]></description>
			<content:encoded><![CDATA[<p>This series of posts will cover how you can integrate XJTAG into your overall test system.</p>
<p>This post is a quick reminder that you can use XJTAG as the focal point for your DFT analysis across all your test systems.</p>
<p><span id="more-229"></span>The Functional Tests screen in XJDeveloper allows you to mark devices, pins or nets as being tested outside of XJTAG. This means that the coverage shown on the DFT Screen will reflect all the testing being done for the board.</p>
<p>The DFT screen provides detailed analysis of the test coverage for your project and the statistics can be “drilled down” to a particular board, device or net to give you the detail you need to identify where test coverage could be improved. Data can be viewed in tabular or graphical form or exported to be used in other applications. In future versions we plan to improve DFT analysis and reporting.</p>
<p>If you have any suggestions for how we could improve our integration &#8211; or have suggestions for improvements to DFT then please feel free to get in touch.</p>
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		<title>Pull Resistors</title>
		<link>http://blog.xjtag.com/2009/07/pull-resistors/</link>
		<comments>http://blog.xjtag.com/2009/07/pull-resistors/#comments</comments>
		<pubDate>Mon, 13 Jul 2009 07:00:18 +0000</pubDate>
		<dc:creator>Dominic Plunkett</dc:creator>
				<category><![CDATA[Board Design]]></category>
		<category><![CDATA[Electronics]]></category>

		<guid isPermaLink="false">http://blog.webtest.ctg.local/?p=12</guid>
		<description><![CDATA[Many of us have been designing electronics for years and haven&#8217;t really considered pull up and down resistor values. We just use the same old values like 10K. With some new silicon the leakage currents are higher than we have been used too. This means the pull resistors might not being doing the task we [...]]]></description>
			<content:encoded><![CDATA[<p>Many of us have been designing electronics for years and haven&#8217;t really considered pull up and down resistor values. We just use the same old values like 10K. With some new silicon the leakage currents are higher than we have been used too. This means the pull resistors might not being doing the task we require. When there is a need to reduce power consumption, again these values need to be looked at in greater detail. XJTAG often finds resistors on boards that don&#8217;t actually perform the task intended.</p>
<p><span id="more-12"></span></p>
<h3>Back to basics</h3>
<p>In most case a range of values will work fine for pull resistors, which is why we don&#8217;t give them much consideration. There are two limits for the range of values that will work correctly.</p>
<h4>The lower limit on resistance can be calculated as follows:</h4>
<ul>
<li>V<sub>supply</sub> = 1.8 V</li>
<li>V<sub>OL</sub> = 0.4 V the worst case ( highest output voltage when an output is driven low)</li>
<li>I<sub>OL</sub> = 12 mA the worst case drive current for the worst case driver on the net</li>
</ul>
<p>Using V = IR ( R= V/I)</p>
<ul>
<li>R= (1.8 &#8211; 0.4) / 0.012 = 116 Ω</li>
</ul>
<p>So a pull up resistor which is stronger (i.e. lower value ) than 116 Ω many not work reliably.</p>
<h4>The upper limit on resistance can be calculated as follows:</h4>
<ul>
<li>V<sub>supply</sub> = 1.8 V</li>
<li>V<sub>IH</sub> = 1.17 V ( lowest V<sub>IH</sub> off all the devices on the net)</li>
<li>I<sub>leakage</sub> = 20 μA Sum of all the worst case leakage currents</li>
</ul>
<p>and therefore</p>
<ul>
<li>R= (1.8 &#8211; 1.17) / 0.000020 = 31.5 kΩ</li>
</ul>
<p>So a pull up resistor which is weaker (i.e. greater value) than 31.5 kΩ many not work reliably.</p>
<h3>So what should I use?</h3>
<p>Most datasheets specify the values across temperature, voltage and process. So the above limits should also work across temperature, voltage and process. You may however want to adjust the limits slightly to take into account resistor tolerances. So where in the above range should you choose?</p>
<p>For lowest power, choose 31.5 kΩ. Apart from that it doesn&#8217;t really matter. If the last milliWatt isn&#8217;t important it can be useful to choose a value that is used elsewhere on the board. E.g. in the PSU the feedback resistor might be 27 kΩ so use that instead of the standard 10 kΩ that you might have chosen.</p>
<p><strong>NB.</strong> One last thing: some internal pull resistors are very strong, especially on the Spartan3 devices. If you are trying to overcome them the effective leakage current is much stronger &#8211; in the mA range is possible.</p>
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