Example XJEase code:

STRING pin := "XJDemo.IC5.2";
PRINT_DEVICE_LINK("This is a link to XJDemo.IC5\n", "XJDemo.IC5");
PRINT("DATA[0]'s "); PRINT_NET_LINK("net\n", GET_NET_FROM_PIN(DATA[0]));
PRINT("IC5.2's "); PRINT_PIN_LINK("pin\n", pin);

Output:
This is a link to XJDemo.IC5
DATA[0]‘s net
IC5.2′s pin

There are many variations to the functions shown above, and full documentation and examples can be found in the XJEase help file. The SRAM memory tests in the latest release of the XJEase Library also make full use of the links.

To use an ODB++ netlist, create or edit a board in XJDeveloper, and check the “ODB++ Project” radio button. Finally browse to the ODB++ file or directory and click OK.

Once XJDeveloper has loaded the netlist, you will be able to view circuit elements in the viewer. This feature is available throughout XJDeveloper. For example you can right-click on a net and choose “Show in Layout Viewer”. The Layout Viewer will be opened and the net will be highlighted.

Errors in the connection test are displayed as hyperlinks (in both XJDeveloper and XJRunner). Clicking the links will display the nets in the Layout Viewer:

Future information on the Layout Viewer can be found in the help files.

Device Library

The device library contains descriptions for passive and test devices. Instead of manually writing the definitions of the devices yourself, or going to the XJTAG website to get them, they are now available directly from within XJDeveloper.

Updates

We are continuously developing and improving this library. Every now and then XJDeveloper will tell you that an new version of the library is available, and it can download and install it automatically if required. This means that you will always have access to new device definitions as XJTAG develop then, as well as the the latest versions of existing definitions.
When you open a project, XJDeveloper will check the definitions used in the project against those in the library. If there are any updated versions available, you will be able to update the definitions used in your project.

Using the library

Everywhere you categorise devices in XJDeveloper, you can now browse the library and select the definition you want. We have also gone one step further, and XJDeveloper will search the library for matching definitions for you automatically.

Suggested Categorisation

Whenever you categorise a device as test or passive, the list of definitions available will now include any matches from the library. XJDeveloper uses BOM information as well as inspecting your netlist to determine possible matches.

You can also get any suggested matches from the library for all the devices on the board by pressing the “Suggest” button on the Categorise Devices screen. This means that with one click you can automatically categorise a large proportion of the devices in the circuit!

The library consists of definitions for the common devices in the 7400 series of logic that XJTAG can support (devices with no state). It also contains definitions for some other devices that we have seen used on customers’ boards. When a device is categorised in XJDeveloper the definitions in the library are always available to use.

If you find a definition that is not in the library, and you feel it should be, contact XJTAG Support and we may include it in a future release. Improving and updating the library is a continuous process with any changes included in the next release of the software.

The library has been designed to make using any updated definitions as simple as possible. When a project is opened XJDeveloper checks to see whether there are newer definitions of the logic used in the project and if there are it prompts to see if you want to use the updated definitions.

Logic devices are categorised on the Categorise Devices screen, much like test, passive, unfitted and ignore devices. The Categorise As section lists the recently used definitions so similar devices can be quickly defined.

When you categorise a device as Logic the following dialog appears:

• Search File
  Select a file to search for a logic definition. The list of files will always include the XJTAG logic library. If you have your own logic definitions then you can search them here.
• Search Name and Search Description
  The XJTAG logic library contains over 150 different types of logic (and is still growing!). To help you find the required definition you can enter part of the name or a description of the device (e.g. “Inverter”). The list of definitions shown will shrink as you type to contain only definitions that match.
• Footprints
  A device may be available in several footprints. Each entry in the Footprints column contains a drop-down with the set of footprints that definition covers. The Summary shows the details for the selected footprint, and the Show Details… button will display the full details of the definition to make sure you select the correct one.

Types of reports you can generate

• Analysis by Circuit Element
  This report contains statistics for elements in the circuit. These can either be the entire circuit or for groups of elements such as boards, devices or nets. It can also provide detailed test coverage for each pin.
• Analysis by Coverage Type
  This report produces board level lists of individual pins according to whether or not they are covered for specific types of test coverage.
• Test Point Reduction
  Having test points on nets where good test coverage can be achieved with XJTAG is not necessary and uses up board space. This report lists these nets and suggests elimination of the test points where appropriate.
• Test Point Suggestion
  It is possible that test coverage on some nets could be improved by adding a test point. This report suggests nets where the designer might consider adding them.

Generating DFT Reports

DFT reports can be generated without having to go to the DFT screen: the Reports wizard can be launched from the Reports button in the Tools menu from anywhere in XJDeveloper. If you are on the DFT screen you can also launch the Reports wizard by clicking the corresponding button at the bottom of the circuit elements list.

Note that the filter options set on the Reports wizard are independent from the ones on the DFT Analysis screen; any filter options used on the DFT Analysis screen to narrow down data have no effect on the generated reports.

Blanking a device has its own challenges - from generating a blank image to stopping the device from reconfiguring itself without having to blank the configuration device as well.

For Altera Cyclone III devices, if they are setup to use either Active Serial or Active Parallel configuration schemes there is an easy way to clear the devices using just a few lines of RAW JTAG. These devices support what Altera calls CONFIG_IO which has two useful instructions for clearing the configuration from a device.

The instructions are ACTIVE_DISENGAGE and PULSE_NCONFIG. These two commands are used in the following XJEase code example. First the configuration controller is halted so the device does not attempt to re-configure itself. Secondly the existing configuration is cleared.

ClearCycloneConfig ()(INT result)
  CONST INT ACTIVE_DISENGAGE := 0b1010110000;
  CONST INT PULSE_NCONFIG := 0b0000000001;

  JTAG
    IR "IC1" := ACTIVE_DISENGAGE;
    IRSCAN "IDLE";
    IR "IC1" := PULSE_NCONFIG;
    IRSCAN "IDLE";
  END;
END;

The above code is a complete XJEase function that can be called as part of a test run and will keep the Altera device blank until the power is cycled.

• There is a new improved circuit elements list which shows the element’s name along with all the calculated test coverage in adjacent sortable columns, that can be shown or hidden, so you can easily explore the results of the DFT analysis.

• The DFT Analysis screen features new improved charts with a modern and professional look; figures, percentages and graphical representation of the DFT analysis data are now displayed in a concise form, so with one glance you can see an overview of the test coverage of your circuit, or of individual circuit elements or groups of elements.

• There are improved filtering options to enable you to narrow down the display to the data of interest and focus on untested sections of your circuit.

The above features are displayed on “dockable” panels allowing you to set up your own preferred configuration of the DFT Analysis screen for maximum efficiency.

(These tips assume the JTAG chain is already configured)

1. Start from the bottom of the Unassigned Devices list, i.e. with the series resistors, and work your way up.
2. As components are categorised and more are discovered go back to the bottom and work your way up again.
3. Once you have classified the first batch of series resistors it is worth checking any new Suggested Series Resistors that appear immediately.  It is unusual to have multiple series resistors on the same net.  If you get lots of new series resistors for classification is it likely that a power net has not been correctly categorised.
4. Classify all Suggested Resistor Packs as pull resistor packs and then use the errors to identify which ones should really be classified as series resistor packs.
5. In general capacitors go in the ignore list.  The only time they do not is if they happen to be on a net between two 1149.6 devices.
6. Unused connectors and headers go in the ignore list.
7. When classifying a Suggested Device use the Explorer to check there is enough access to a device to test it before spending the time locating the right XJEase script.
8. Test points go in the Unfitted category.  This stops them having an effect on the DFT coverage report.  Uncheck “Only Show Accessible Devices” to make sure they are all found.
9. Classify any fuses, ferrite bead, or inductors with a PDD file so that all the power nets on the board are correctly identified.  Again, uncheck “Only Show Accessible Devices” to make sure they are all found.
10. Make sure you read any BSDL file warnings (before you disable warnings on those devices). Reading them is likely to explain why the JTAG chain didn’t run the first time you tried it…

First, it will expect one end of the resistor to be attached to a net that has been classified as a Power or Ground net.

Second, during the Connection Test it will expect to be able to drive the non-power/ground side of the resistor to the opposing value.  So, if it is a pull-down resistor the connection test will check that it can drive the non-power side of the resistor high.

If you have a strong pull resistor, say 50 Ω, then it is not unusual that the JTAG device will be unable to supply enough current to oppose the pull resistor.  In these cases where it is not intended for the pull of the resistor to be opposed, e.g. configuration strapping resistors, the resistor should be classified as a series resistor.  The non-power net will still be covered by the connection test but instead of driving the net it will be checked that at no point does the net take the opposite value to its pulled value.

If a BOM is imported as part of the setup or if the net list contains the resistor values, e.g. the net list is in the RINF format, then the XJTAG system will not suggest low ohmic value resistors as pull resistors but instead will put them in the “Other Resistors” category so the user can assign them appropriately.