Welcome to the XJTAG blog
This site features regular posts from members of the XJTAG development and support team, designed to help maximise your productivity when working with XJTAG. The posts highlight particular features of the different software packages that make up the XJTAG development system or aspects of the XJEase language.
We want your feedback to make this blog useful to engineers like you. If you feel a post needs to be extended to give more detail, if there is a topic that you would like to see covered by future posts or you just found a particular post useful, please let us know. Feedback »
Clearing Altera Cyclone III Devices
8 November, 2010
In the XJTAG application note “Working with configured Xilinx and Altera devices” the point is made that the way to get the best test coverage is to test with blank devices.
Blanking a device has its own challenges – More »
By Dominic Plunkett on 8 November, 2010 |
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Design for Test Analysis in XJDeveloper 2.4 – Part 1
25 October, 2010
The DFT Analysis screen in XJTAG version 2.4 has been completely redesigned to allow you to assess the test coverage of your circuit design more easily and in a more efficient way. This post highlights the most important new features. More »
By Tina Chremmou on 25 October, 2010 |
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Categorising devices in XJDeveloper – 10 rules of thumb
11 October, 2010
We asked one of the guys in-house who works with XJDeveloper most of the time to give some tips from his experience of setting up projects, and here is what he came up with: More »
By Bob Storey on 11 October, 2010 |
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Using CONNECT vs PULL in PDD files
27 September, 2010
Why use CONNECT not PULL for low-value pull resistors? When a resistor is specified as a pull resistor the XJTAG system will expect two things: More »
By Bob Storey on 27 September, 2010 |
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XJTAG Boundary Scan Testing with OMAP 35xx devices
13 September, 2010
Texas Instruments’ OMAP processors are becoming more and more popular. We have seen quite a few come through the office recently.
The good news is that the OMAP processors do support boundary scan testing. More »
By Bob Storey on 13 September, 2010 |
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Debugging faults: always remember XJAnalyser!
6 September, 2010
The traditional technique for debugging printed circuit boards is to “observe” the state using oscilloscopes or multi-meters and deduce a fault. This method actually suppresses a very powerful engineering instinct that would help us a lot if we could only give it a better chance. More »
By Bob Storey on 6 September, 2010 |
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Debugging the Connection Test – part 4 (Logic errors)
23 August, 2010
With the new Logic support in XJTAG, the connection test can find more errors More »
By Bob Storey on 23 August, 2010 |
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Logic in XJTAG – capabilities and limitations
9 August, 2010
We see a lot of logic components used on boards that come through our office. Most often we see buffers, bus transceivers and devices of that nature, but also plenty of the usual discrete logic chips – simple gates, decoders, encoders etc. More »
By Bob Storey on 9 August, 2010 |
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Highlights of the 2.4 Release
26 May, 2010
The latest version of XJTAG, version 2.4, is now available to customers who are in maintenance. More »
By Bob Storey on 26 May, 2010 |
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New XJTAG contact details
31 March, 2010
XJTAG has moved office. Our office move is complete and all our details are now updated on the XJTAG website, but just to make sure everyone has picked up our new contact details, here they are. More »
By Bob Storey on 31 March, 2010 |
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