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Stuck-at testing on 1149.6 pins

One of the standard types of testing that is done in XJTAG’s Connection Test is to detect stuck-high and stuck-low faults (shorts to power/ground). Using the IEEE 1149.1 JTAG standard this can be done providing the net has full IN/OUT functionality – that is to say it can both drive output and read input at the same time.  The test is implemented by driving the net high or low and then checking that the value read from the net changes to reflect the value driven. […]

By |Categories: Connection Test, Support, XJDeveloper|Tags: , , |

Revisions – part 3

This blog article is the final part of the three part series detailing the new Revisions feature in XJDeveloper 3.10. This article looks under the hood at how the device matching algorithm works. […]

By |Categories: Board Design, Features, XJDeveloper|Tags: , , |

Revisions – part 2

This blog article is the second part of a three part series detailing the new Revisions feature in XJDeveloper 3.10. This article covers the setup process for a revisions project. […]

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Revisions – part 1

The big new feature in XJTAG 3.10 is Revisions support. We will be posting a 3 part blog series to go in to detail on how it works and how it can help you save time in your board setups. […]

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PCOLA/SOQ Test Coverage in XJTAG. Part 1.

PCOLA/SOQ is a unified way to assess the test coverage offered by testing systems. Rather than directly considering what the test system can detect, it starts by considering everything that could be at fault in the device under test, and then scores how well the test system could identify such faults. […]

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Using IIC to enable power supplies on your board

With the introduction of External Hardware per Subchain in XJDeveloper v3.9 it is possible to write a test that powers up your board using your XJLink2 to directly control the IIC pins before the JTAG chain is operable. Following is an example of how to set up this test in your project: […]

By |Categories: Features, Other, Support, XJDeveloper, XJEase|Tags: , , , , |

External Hardware available per-Subchain (including testing without JTAG)

Version 3.9 of XJDeveloper introduces the ability to control which External Hardware machines operate in each Subchain, and integrates this control into the Dynamic Chains feature. This means that any test may now be configured to use just JTAG, just External Hardware, or a combination of both, to drive signals on the circuit under test. […]

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Editing configuration variables in XJTAG 3.9

Configuration variables in XJTAG allow settings to be configured for a device.  For example the address of an IIC device may need to be defined. Configuration variables are associated with a test device file, and in previous versions of XJTAG were only available in device files from the XJEase library. From XJTAG 3.9 configuration variables can be defined and edited in XJDeveloper. […]

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XJTAG version 3.9

A new major version of XJTAG – version 3.9 – is now available from our website for users who are in maintenance. […]

XJEase Waveform Viewer updated in version 3.8.3

Version 3.8.3 of XJTAG comes with some usability updates for the new XJEase Waveform Viewer. Tool tip information, event labels, and a context menu for pin navigation and source tracking has been added. […]