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PCOLA/SOQ Test Coverage in XJTAG. Part 1.

PCOLA/SOQ is a unified way to assess the test coverage offered by testing systems. Rather than directly considering what the test system can detect, it starts by considering everything that could be at fault in the device under test, and then scores how well the test system could identify such faults. […]

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Functional test coverage in XJTAG version 3.8

In version 3.8 of XJTAG the way that functional test coverage is inferred has changed slightly. Here is a summary of what has changed. […]

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Test Coverage In XJDeveloper 3.8

With the release of XJDeveloper 3.8 the former DFT Analysis screen has been renamed to Test Coverage and merged with the Functional Test screen. The Functional Tests page is now accessed through the new Functional Tests tab at the top of the screen. The chart view has also moved to a separate tab, but all tabs can be rearranged and docked to suit the users preference. Other noticeable changes include the addition of a net access column to the Summary Statistics page and the reorganisation of the options section, along with the addition of a few new features. […]

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Test Summary Report

In XJTAG 3.7, XJDeveloper can now generate a new style of DFT report. The Test Summary Report can be found via the DFT Reports menu item within the Tools menu, or in the Reports menu on the DFT Analysis screen (as are the other DFT reports) and contains up to four sections: […]

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Categorising devices: Ignore, Unfitted, or Uncategorised?

(This article has now been replaced by an updated version, here.) […]

XJTAG Extension for Altium Designer

XJTAG’s extension for Altium Designer is now available! It is called the XJTAG DFT Assistant and is aimed at board designers who want to improve the testability of their designs through boundary scan.  […]

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Layout Viewer Visualisation

Having lots of information is great, but sometimes the most difficult thing is displaying that data in a meaningful way. We have created two new information overlays for Layout Viewer, allowing you to visualise test coverage statistics or live pin data from Analyser on your board layout. […]

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Design for Test Analysis in XJDeveloper 2.4 – Part 2

This post introduces the new DFT reports which are generated from the DFT analysis data. This is a feature introduced in XJTAG version 2.4. […]

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Design for Test Analysis in XJDeveloper 2.4 – Part 1

The DFT Analysis screen in XJTAG version 2.4 has been completely redesigned to allow you to assess the test coverage of your circuit design more easily and in a more efficient way. This post highlights the most important new features. […]

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Integrating XJTAG with other Test Systems – DFT

This series of posts will cover how you can integrate XJTAG into your overall test system. This post is a quick reminder that you can use XJTAG as the focal point for your DFT analysis across all your test systems. […]

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