In the XJTAG application note “Working with configured Xilinx and Altera devices” the point is made that the way to get the best test coverage is to test with blank devices. Blanking a device has its own challenges – […]
We all pay close attention to the termination of high speed signals, especially clock signals. However in many of the designs I see this doesn’t seem to have happened for the JTAG clock signal TCK. But TCK is a clock signal just like any other clock signal. […]
One of the exciting new features of XJLink2 is the ability to measure a number of voltages. Via the 20-way XJlink2 connector you can measure up to 18 different voltages. This means supply rail voltages can be measured before (and during) JTAG testing, and analogue measurements are now simple to make during your tests. […]
XJLink2 is the only JTAG interface that can accurately measure frequency. […]
I bet most of you haven’t considered how you wire up a bench power supply – you just set the voltage and current limit and off you go. […]
In XJEASE the SET statement is the command to access pins via a JTAG device. XJEase works out via the BSDL files and netlist how to access a pin on a non JTAG device from a JTAG device. […]
Many of us have been designing electronics for years and haven’t really considered pull up and down resistor values. We just use the same old values like 10K. With some new silicon the leakage currents are higher than we have been used too. This means the pull resistors might not being doing the task we require. When there is a need to reduce power consumption, again these values need to be looked at in greater detail. XJTAG often finds resistors on boards that don’t actually perform the task intended. […]