Built-in Test Reset Sequences for devices with nTRST pins

XJTAG 4.1 can automatically generate test reset sequences for many more hardware designs than previous versions. Previously, if a JTAG device had an nTRST pin that needed resetting between tests, you had to manually create a sequence with a waveform like the following: […]

New board to protect against current spikes

One potential cause of damage to an XJLink2 JTAG controller is transient current spikes caused when a board is first powered on and the decoupling capacitors are charged. We’ve talked about this issue on the blog before and shown that, unfortunately, even a very brief spike in current can cause damage to the controller. [...]

Extending XJTAG’s Signal Integrity Error Analysis

Continuing from XJTAG 3.12’s Enhanced Signal Integrity Analysis feature (see here and here), XJTAG 3.13 brings more algorithms to help identify potential issues with the JTAG chain. This article describes more of the symptoms it can spot and their likely causes. […]

Improve your printed circuit board test, debug and programming processes using XJTAG’s powerful boundary scan test suite. It can speed up your design and development, as well as providing excellent test coverage in production.
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