Solving common Connection Test problems

There are several types of error found by Connection Test which regularly (and unsurprisingly) confuse users. This article tries to help out…

Mis-categorised Resistors

Mis-categorising a resistor is probably the most common mistake we see in circuit set-up. It can cause problems whichever way it’s done.

  • If a pull resistor is incorrectly marked as a “Connect” resistor then XJTAG will assume that both sides of the resistor are power/ground nets rather than just one side. It may be that another device on the net then toggles it, causing XJTAG to think the power pin is open-circuit. Or alternatively XJTAG doesn’t test a net that it could.
  • If a low-impedance connection is marked as a pull resistor, XJTAG will try to drive the net at some point during the connection test. This can cause “stuck-at” errors or may cause the power supply to hit its current limit and cause a voltage dip deep enough to break the JTAG chain.
  • If a pull resistor impedance is too high, it may not work properly, or if it does, it may take too long for the voltage to return to the correct state, causing XJTAG to take a reading before it has done so and causing the connection test to fail.

Configured devices

This happens with both CPLD and FPGA devices. Many programmable devices can have their pins re-defined, to reduce their capability. For example the BSDL file may say the pin has both read and write capabilities, but the configuration applied may make it write-only. XJTAG will try to read from the pin unaware that it is disabled, and generally always read the same value. Pre-configured devices generally result in a number of stuck-at errors being reported.

We see this most often with FPGAs, where they download an image from a PROM at power-up or even where they receive an image from a CPU as the board boots, before it gets put into JTAG mode. Clearing the relevant EEPROMs before testing and programming them afterwards is one solution, or you can use the manufacturer’s tools to create a STAPL or SVF file to clear the device and get XJTAG to run this before it performs the Connection Test. Or perhaps better yet, bring the Mode pins for the device(s) to a connector so that they can be put into JTAG config mode.

Non-JTAG devices driving the net

We frequently see errors caused by non-JTAG devices driving the net. This is in turn caused by the user not setting disable values correctly. A typical example of this would be errors on a memory or flash device’s data bus. During the connection test the device has to be set not to drive the bus or it will conflict with XJTAG writing to it. Typically this is done by setting an appropriate disable value on the device’s chip select or output enable pin(s).