XJFlash, XJTAG’s ultra-fast flash programmer, now supports programming flash devices connected to Altera Cyclone V SoC FPGAs. The flash can be connected to the FPGA Fabric or the Hard Processor System (HPS) pins, and includes support for different flash types including many QSPI devices. […]
XJFlash, XJTAG’s ultra-fast flash programmer, now supports programming flash devices connected to the Zynq-7000’s Processing System (PS), including support for programming QSPI configuration devices. Flash devices connected directly to the Zynq-7000’s Programmable Logic (PL) are also supported. […]
Creating SVF files to program Xilinx FPGAs has historically been accomplished using iMPACT, installed as part of Xilinx’s ISE Design Suite. With Xilinx’s most recent FPGAs this is no longer possible and instead their new tool, Vivado, must be used. The following instructions guide you through this process and assume version 2016.1 or later of Vivado. […]
When using JTAG with a Device Under Test (DUT) connected to a bed-of-nails test fixture, often little attention is paid to the way the JTAG signals are wired. This article (published in SMT magazine last year) gives a helpful explanation of why it is important to get this right, and gives tips for best practice.
In Version 3.0.2 and later an additional Settings tab has been added to the XJRunner Setup screen in XJDeveloper. This tab, labelled “Functions”, […]
This article is a summary of our answers to various customers who have asked us how to convert between XJTAG, Windows and Unix timestamps, so that they can correctly pass data between test systems. […]