One potential cause of damage to an XJLink2 JTAG controller is transient current spikes caused when a board is first powered on and the decoupling capacitors are charged. We’ve talked about this issue on the blog before and shown that, unfortunately, even a very brief spike in current can cause damage to the controller. Introducing [...]
We are starting to see an increased number of questions about support for DDR5 DIMMs and SDRAM devices, which are rapidly becoming mainstream. Support for DDR5 devices will be added to the XJEase Library in the near future, but in the meantime XJTAG can now make DDR5 models available on request to customers with a [...]
XJTAG has included partial support for the standardised PCOLA/SOQ method of measuring test coverage for some time. The recent XJEase library update, library version 181, contains PCOLA/SOQ data for the test coverage of devices, completing this functionality. […]
This blog article is the final part of the three part series detailing the new Revisions feature in XJDeveloper 3.10. This article looks under the hood at how the device matching algorithm works. […]
The big new feature in XJTAG 3.10 is Revisions support. We will be posting a 3 part blog series to go in to detail on how it works and how it can help you save time in your board setups. […]
XJTAG’s extension for Altium Designer is now available! It is called the XJTAG DFT Assistant and is aimed at board designers who want to improve the testability of their designs through boundary scan. […]
When using JTAG with a Device Under Test (DUT) connected to a bed-of-nails test fixture, often little attention is paid to the way the JTAG signals are wired. This article (published in SMT magazine last year) gives a helpful explanation of why it is important to get this right, and gives tips for best practice.
Texas Instruments’ OMAP processors are becoming more and more popular. We have seen quite a few come through the office recently. The good news is that the OMAP processors do support boundary scan testing. […]
We all pay close attention to the termination of high speed signals, especially clock signals. However in many of the designs I see this doesn’t seem to have happened for the JTAG clock signal TCK. But TCK is a clock signal just like any other clock signal. […]
One of the exciting new features of XJLink2 is the ability to measure a number of voltages. Via the 20-way XJlink2 connector you can measure up to 18 different voltages. This means supply rail voltages can be measured before (and during) JTAG testing, and analogue measurements are now simple to make during your tests. [...]