XJEase SWD Enhancements
XJTAG 4.1 introduces enhancements to the ARM Serial Wire Debug (SWD) protocol to return protocol operation acknowledgement responses in XJEase. […]
Tips for setting up an XJLink-PF40 pin mapping
With the release of the XJLink-PF40 and XJTAG 4.1, setting up your pin mapping might have just got a bit more complicated. The XJLink-PF40 supports twice as many TAPs (8) and has twice as many I/O pins (40) as the XJLink2 so there can be more work involved in setup. Luckily, XJDeveloper 4.1 contains some [...]
Multi-sourcing Device Configurations
New in version 4.1, XJTAG has support for multi-sourcing test device configurations. This post will explain how to define multiple possible configurations for your test devices. A follow-up post will compare XJTAG’s Variants, Revisions and Multi-sourcing features and explain which is best to use in different scenarios. […]
XJEase Library Release 183 details
Here is a summary of the additions to the XJEase library made recently in library version 183. Note: Some files in this library require an XJTAG software version of at least 3.10.6. […]
Test Reset Sequence Editor Improvements
XJTAG 4.0 has significantly improved the user experience of creating and editing test reset sequences – the way in which JTAG devices are put into their JTAG mode. […]
Expanding Enhanced Signal Integrity Error Analysis
XJTAG 3.12 expanded the capability of the Signal Integrity Analysis in XJTAG tools, adding the ability to suggest certain causes of error. This post continues from the previous post on this subject, and describes further errors that XJTAG tries to identify. […]
Categorising devices: Ignored, Unfitted, Excluded or Uncategorised?
(This updates an older article due to the addition of the Excluded category in XJTAG 3.12) One of the questions we are commonly asked by new users, and also by users who have not used XJTAG for a while and are coming back to it, is about the differences between device categorisations in XJDeveloper. [...]
Setting default pin values in XJEase
Historically we have provided three mechanisms for defining some form of constant or default values for a pin/net in XJDeveloper. These are BSDL compliance pins, bus disable values and constant pins, which allow you to define pins which XJTAG should keep in a constant state during automated testing, such as with Connection Test. However these [...]
Using IIC to enable power supplies on your board
With the introduction of External Hardware per Subchain in XJDeveloper v3.9 it is possible to write a test that powers up your board using your XJLink2 to directly control the IIC pins before the JTAG chain is operable. Following is an example of how to set up this test in your project: [...]
External Hardware available per-Subchain (including testing without JTAG)
Version 3.9 of XJDeveloper introduces the ability to control which External Hardware machines operate in each Subchain, and integrates this control into the Dynamic Chains feature. This means that any test may now be configured to use just JTAG, just External Hardware, or a combination of both, to drive signals on the circuit under test. [...]