XJTAG Blog

If your project uses an ODB++ netlist, then you can take advantage of the Layout Viewer in both XJDeveloper and XJRunner. Layout Viewer uses the layout information in the netlist to allow you to visualise the physical location of components, pins and nets on a board. This is especially useful for visualising errors from the connection test to guide you towards the most likely location of a fault on a board. Read the rest of this entry »

Version 2.6 of XJDeveloper has two exciting new features that make developing your projects easier – a library of definitions for devices and a “suggest categorisation” feature. Read the rest of this entry »

This post outlines how to categorise a device as a logic device in XJDeveloper and explains some of the useful features. Read the rest of this entry »

This post introduces the new DFT reports which are generated from the DFT analysis data. This is a feature introduced in XJTAG version 2.4.
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The DFT Analysis screen in XJTAG version 2.4 has been completely redesigned to allow you to assess the test coverage of your circuit design more easily and in a more efficient way. This post highlights the most important new features. Read the rest of this entry »

We see a lot of logic components used on boards that come through our office. Most often we see buffers, bus transceivers and devices of that nature, but also plenty of the usual discrete logic chips – simple gates, decoders, encoders etc. Read the rest of this entry »

The new XJlink2 has a button and some LEDs, which aren’t found on most JTAG interface devices. These are simply there to make life a little simpler on a crowded workbench. Once you have a project open in XJRunner you can start testing by just pressing the button – this can be quicker than finding your mouse which has at some point almost certainly moved off the on-screen Run button. Read the rest of this entry »