Introducing Dynamic Chains

‘Dynamic Chains’ is a term we’ve coined to describe a test system that has the ability to drive more that 1 JTAG chain configuration. This may be possible if it has multiple chains driven by different TMS or TCK pins, or a single chain that has multiple JTAG device variations (for example using a Scan Bridge). Before v3.3, XJTAG projects [...]

Minimum processor requirements for XJTAG

We recently had to support a customer who was unable to run XJTAG 3.1 on an older PC. It turned out that the processor in the PC in question did not support SSE2 instructions. During the development of v3.1 we upgraded the compiler we use to build XJTAG and it now uses these instructions to speed up execution. SSE2 instructions were introduced with the Pentium 4 in 2001 and were supported in AMD processors with their Opteron and Athlon 64 processors from 2003 onwards.

2014-02-12T11:12:27+00:00By |Categories: Support|Tags: |
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