A new feature in XJTAG 3.11 is the ability to create user-defined XJEase libraries containing your own XJEase device files and additional code files. Part 1 in this 2 part blog series will explain how to use the new XJEase Library Editor application to create user libraries. Part 2 will then explore how user libraries [...]
A new major version of XJTAG – version 3.11 – is now available from our website for users who are in maintenance. […]
XJTAG 3.10 adds a control that allows the default values of XJEase global variables to be overridden. In XJDeveloper, clicking on ‘Options’ at the bottom of the test list on the Run Tests screen now includes a Set Global Variables tab: […]
This blog article is the final part of the three part series detailing the new Revisions feature in XJDeveloper 3.10. This article looks under the hood at how the device matching algorithm works. […]
This blog article is the second part of a three part series detailing the new Revisions feature in XJDeveloper 3.10. This article covers the setup process for a revisions project. […]
The big new feature in XJTAG 3.10 is Revisions support. We will be posting a 3 part blog series to go in to detail on how it works and how it can help you save time in your board setups. […]
A new major version of XJTAG – version 3.10 – is now available from our website for users who are in maintenance. […]
PCOLA/SOQ is a unified way to assess the test coverage offered by testing systems. Rather than directly considering what the test system can detect, it starts by considering everything that could be at fault in the device under test, and then scores how well the test system could identify such faults. […]
With the introduction of External Hardware per Subchain in XJDeveloper v3.9 it is possible to write a test that powers up your board using your XJLink2 to directly control the IIC pins before the JTAG chain is operable. Following is an example of how to set up this test in your project: [...]
Version 3.9 of XJDeveloper introduces the ability to control which External Hardware machines operate in each Subchain, and integrates this control into the Dynamic Chains feature. This means that any test may now be configured to use just JTAG, just External Hardware, or a combination of both, to drive signals on the circuit under test. [...]