We are in the final stages of a major overhaul of the XJEase device file library and we expect to release it in the next few days. […]
Recently one of our newer customers started on their first solo board setup. They had previously seen XJTAG demonstrated and had also had their initial board setup done by an XJTAG engineer. When they came to setting a board up for themselves they tried to follow the path that the XJTAG engineer had talked them through – […]
We have been starting to see questions about support for DDR4 SDRAM devices, which are gradually becoming available. We have published a guide to using JTAG to test DDR4 memory on the XJTAG website. It contains a link to slides used at a recent presentation on the subject. Support for DDR4 devices will be coming soon [...]
When using JTAG with a Device Under Test (DUT) connected to a bed-of-nails test fixture, often little attention is paid to the way the JTAG signals are wired. This article (published in SMT magazine last year) gives a helpful explanation of why it is important to get this right, and gives tips for best practice.
We recently had to support a customer who was unable to run XJTAG 3.1 on an older PC. It turned out that the processor in the PC in question did not support SSE2 instructions. During the development of v3.1 we upgraded the compiler we use to build XJTAG and it now uses these instructions to speed up execution. SSE2 instructions were introduced with the Pentium 4 in 2001 and were supported in AMD processors with their Opteron and Athlon 64 processors from 2003 onwards.
A new XJRunner Integration .NET API was released in XJTAG 2.6. This came with a new set of LabVIEW examples detailing how the API could be used within the LabVIEW environment. These examples have been added to since that release. […]